bitkeeper revision 1.1159.1.441 (41a1c3b8bTHk_2Uj7_0jjGdOGPEIsw)
authorcl349@arcadians.cl.cam.ac.uk <cl349@arcadians.cl.cam.ac.uk>
Mon, 22 Nov 2004 10:47:20 +0000 (10:47 +0000)
committercl349@arcadians.cl.cam.ac.uk <cl349@arcadians.cl.cam.ac.uk>
Mon, 22 Nov 2004 10:47:20 +0000 (10:47 +0000)
Merge arcadians.cl.cam.ac.uk:/auto/groups/xeno/BK/xen-unstable.bk
into arcadians.cl.cam.ac.uk:/auto/groups/xeno/users/cl349/BK/xen.bk-smp

1  2 
xen/arch/x86/idle0_task.c
xen/arch/x86/irq.c
xen/arch/x86/memory.c
xen/arch/x86/smpboot.c
xen/arch/x86/traps.c
xen/common/domain.c
xen/include/asm-x86/config.h
xen/include/asm-x86/processor.h
xen/include/xen/irq.h
xen/include/xen/sched.h

index 8dc2784e7c1f45b137eab05824e841cd84f736f3,a8c670c573d63ecee3cbfe9dae360193ce61f797..cc31d7df1bfcc6e620a7ea62be52d8187dbd61f3
@@@ -2,30 -2,16 +2,23 @@@
  #include <xen/sched.h>
  #include <asm/desc.h>
  
 -#define IDLE0_TASK(_t)           \
 -{                                \
 -    processor:   0,              \
 -    id:          IDLE_DOMAIN_ID, \
 -    mm:          IDLE0_MM,       \
 -    thread:      INIT_THREAD,    \
 -    flags:       1<<DF_IDLETASK, \
 -    refcnt:      ATOMIC_INIT(1)  \
 +#define IDLE0_EXEC_DOMAIN(_ed,_d)    \
 +{                                    \
 +    processor:   0,                  \
 +    mm:          IDLE0_MM,           \
 +    thread:      INIT_THREAD,        \
 +    domain:      (_d)                \
  }
  
 -struct domain idle0_task = IDLE0_TASK(idle0_task);
 +#define IDLE0_DOMAIN(_t)             \
 +{                                    \
 +    id:          IDLE_DOMAIN_ID,     \
 +    d_flags:     1<<DF_IDLETASK,     \
 +    refcnt:      ATOMIC_INIT(1)      \
 +}
 +
 +struct domain idle0_domain = IDLE0_DOMAIN(idle0_domain);
 +struct exec_domain idle0_exec_domain = IDLE0_EXEC_DOMAIN(idle0_exec_domain,
 +                                                         &idle0_domain);
  
- /*
-  * per-CPU TSS segments. Threads are completely 'soft' on Linux,
-  * no more per-task TSS's. The TSS size is kept cacheline-aligned
-  * so they are allowed to end up in the .data.cacheline_aligned
-  * section. Since TSS's are completely CPU-local, we want them
-  * on exact cacheline boundaries, to eliminate cacheline ping-pong.
-  */ 
- struct tss_struct init_tss[NR_CPUS] __cacheline_aligned;
+ struct tss_struct init_tss[NR_CPUS];
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge